Glass Substrates: The Next-Generation Foundation for Advanced Packaging

I.Why choose glass

Packaging for AI chips is undergoing a materials revolution.

Over the past two decades, organic substrates (primarily ABF carrier boards) have been almost the only option for high-end packaging. They are mature, cost-effective, and backed by a stable supply chain. However, as chips grow larger, I/O density rises, and power consumption becomes more concentrated, the limitations of organic materials have begun to emerge.

The core challenge lies in the mismatch of coefficient of thermal expansion (CTE).

The CTE of an AI chip (silicon) is approximately 3–4 ppm/°C, while that of organic substrates ranges from 15 to 20 ppm/°C. During packaging, the temperature drops from 250°C down to room temperature. This discrepancy causes relative displacement between the chip and substrate. Such deformation is acceptable for small chips, yet warpage becomes uncontrollable once the package size exceeds 50×50 mm

Glass substrates offer a straightforward solution: their CTE can be tuned to 3–5 ppm/°C, nearly perfectly matching that of silicon chips. Warpage at high temperatures is reduced by more than 70% compared with organic substrates.

This is not its only advantage. Intel outlined three key metrics in its glass substrate roadmap released in 2023:

• Flatness: Glass boasts approximately 5,000 times better surface flatness than organic substrates. With surface roughness controlled below 1 nm, it supports fine-line routing at 0.5 μm line width and space.

• Interconnect density: Glass substrates can achieve 2 μm/2 μm line width and space. Compared with organic substrates (typically ≥5 μm/5 μm), the routing density increases by over 150%, and up to 10 times at maximum.

• Panel-Level Packaging (PLP) area utilization: Using square glass panels (e.g. 510×515 mm), the area utilization can be improved from roughly 45% to 81% versus round wafers, cutting packaging costs by 10%–20%.

Organic substrates are not inherently poor; they simply can no longer meet the requirements.

II. Who are the players

Discussions would be meaningless if glass substrates remained merely in the lab. The key point is that four industry giants have simultaneously entered the final sprint phase before mass production.

Intel: Initiator and pioneer

Intel first added glass substrates to its advanced packaging roadmap in September 2023. At OFC 2026, Intel publicly unveiled its integrated prototype of Co-Packaged Optics (CPO) built on glass substrates for the first time. This means glass substrates can not only carry chips, but also directly integrate optical interconnects.

On the manufacturing side, Intel’s Arizona pilot line has achieved small-volume supply. A more critical move: it plans to renovate its Rio Rancho factory in New Mexico to build the world’s first mass-production base for glass substrates. Spanning 218 acres, the site already has silicon photonics manufacturing capacity and will support EMIB packaging technology concurrently.

Latest update: On June 5, Intel further announced a joint investment of approximately $3.3 billion with 3D Glass Solutions to build a semiconductor substrate manufacturing plant in Odisha, India. The facility will focus on producing glass substrates and high-density interconnect substrates for advanced packaging. Upon full capacity ramp-up, it is expected to yield around 50 million glass-substrate 3D packaging units annually.

In addition, Intel’s first Xeon 6+ “Clearwater Forest” server processor with a glass core substrate has achieved commercial rollout — the industry’s first mass-produced processor built on glass substrates.

SKC (Absolix): Most aggressive mass production timeline

Absolix, under SK Group, is arguably the most advanced player at present. The company has raised approximately 589.6 billion Korean won (around 2.7 billion RMB) to push forward mass production, and its world-first glass substrate factory has been completed. AMD and AWS are conducting customer qualification tests. Yield verification is in the late stage: electrical and signal performance validation has been finished, and yield stabilization is underway.

If testing proceeds smoothly, mass production may kick off as early as the end of 2026 — at least one year ahead of common industry expectations.

Samsung Electro-Mechanics: A stepping stone to Apple’s supply chain

Samsung Electro-Mechanics has supplied glass substrate samples to Apple for the packaging and testing of Apple’s in-house AI server chip codenamed “Baltra”. Its pilot line at the Sejong plant has achieved a process breakthrough with a TGV aspect ratio of 10:1 and copper fill void rate below 0.5%.

A joint venture between Samsung and Japan’s Sumitomo Chemical is scheduled to be established in the second half of 2026 for mass production of glass core materials. Mass production is expected to commence after 2027.

TSMC: First to release a clear timeline

TSMC plays a distinctive role. Its technical roadmap differs from Intel’s——CoPoS（Chip-on-Panel-on-Substrate）It adopts a square panel design and uses multi-layer RDL to replace traditional silicon interposers, representing an alternative parallel technical path

The most pivotal update came on June 4: TSMC Chairman Mark Liu stated clearly at the shareholder meeting that the CoPoS pilot line has been completed. It is projected to take 2–3 years to reach substantial production scale. This marks the first time TSMC has provided a quantified timeline. Compared with its previous vague statement of “in a few years”, the outlook is notably clearer and slightly accelerated.

With these four giants advancing in parallel, the thesis that 2026 will mark the first year of commercialization for glass substrates is being validated

III. Where are the domestic players

The core of glass substrate manufacturing lies in the TGV (Through Glass Via) process. Unlike TSV (Through Silicon Via), glass cannot be etched using conventional dry or wet etching methods, and new technologies such as Laser-Induced Deep Etching (LIDE) are required.

The TGV process flow mainly consists of four steps: via formation (laser induction + chemical etching) → via metallization and filling (copper electroplating) → surface RDL routing → back-end inspection and packaging.

Vogtec is currently the most advanced domestic player.

• Vogtec’s TGV production line in Wuhan has been put into operation, while its 8.6th-generation line in Chengdu is under commissioning. The monthly capacity will reach 24,000 panels at full production.

• It has basically mastered the full TGV process. Its glass substrates for 1.6T optical modules have completed small-batch sampling, and glass substrates for chips are steadily undergoing customer validation.

• It collaborates with leading domestic enterprises to develop Chiplet advanced packaging substrates and has entered joint development with companies such as Arctic Silicone.

One clarification is needed: Vogtec issued an announcement in April explicitly stating that it is not involved in the development or production of Apple's semiconductor glass substrate samples. Market rumors had previously linked the company to Apple's supply chain, but this is not the case.

BOE:

Its glass-based packaging substrate pilot line, built with a 993 million RMB investment in 2024, has delivered samples to selected domestic customers. Some customers have passed concept verification and entered the technical testing phase. On May 20, the company signed a Memorandum of Understanding (MOU) with Corning for joint research on cutting-edge technologies including glass packaging substrates and optical interconnects (for CPO applications). Corning will supply high-end specialty glass substrates and underlying TGV technology, while BOE leverages its high-generation production lines to carry out precision processing and realize Panel-Level Packaging implementation.

Nevertheless, BOE also stated that the yield of the pilot line has not yet reached mass production standards, and the timeline for achieving such yield remains highly uncertain — commercialization is still at a very early exploratory stage

Caihong Group: 

The company mainly focuses on display glass materials in the glass substrate sector. It has achieved a technical breakthrough with its “616” new-formula glass substrate, whose performance meets the requirements of high-generation display panels. Currently, the application of this material in the field of semiconductor packaging is still in the early research stage.

Equipment segment: Investment for a domestic 510×515 mm glass substrate production line stands at approximately 1.3 to 1.5 billion RMB. In terms of equipment composition, laser drilling and etching lines account for 30%, PVD and photolithography equipment 50%, and wet process equipment 20%. Relevant equipment suppliers include Dier Laser (the only domestic vendor with mass-produced TGV laser micro-hole equipment, which has achieved panel-level shipments), Han’s Laser, Yuhuan CNC (polishing), and Huicheng Vacuum (magnetron sputtering).

The real status of domestic localization is as follows: Vogtec leads the mass production progress; BOE is at an early stage with pilot-line sample delivery yet insufficient yield. Most other manufacturers remain in the R&D or pilot-test phase. There is no public evidence to confirm their entry into the AI chip supply chains of NVIDIA and AMD, or to become secondary suppliers for Intel and TSMC. This is not pessimism, but a sober assessment.

IV. What is the industry consensus

Validation of industrial trends relies not only on the timelines laid out by industry giants but also on signals from industry consensus and market research.

Catalytic impact of TSMC: On June 4, TSMC Chairman Mark Liu explicitly set the timeline for CoPoS to achieve large-scale mass production within “2–3 years”. This represents the strongest signal that glass substrates have entered the mainstream packaging roadmap. TSMC’s entry means glass substrates are no longer Intel’s “solo performance”, but a shared direction for the entire semiconductor packaging industry.

Market size forecast: Omdia projects that the global glass substrate market will grow from approximately $18.6 billion in 2026 to over $32 billion in 2030, with a compound annual growth rate (CAGR) of around 14.5%. This figure covers multiple categories including display glass and semiconductor packaging glass, and cannot be directly equated to the market space for AI packaging. Nevertheless, it demonstrates that consensus on this direction is taking shape

Institutional viewpoint: Soochow Securities describes glass substrates as “the new-generation foundation for advanced packaging in the AI era”. According to industry report forecasts, semiconductor glass wafer shipments will grow at a CAGR of 10.2% from 2025 to 2030. Within this, demand for the storage (HBM) and logic chip packaging segments will surge at a rate as high as 33%.

Three parallel technical paths:

Intel’s approach: Glass core substrates replace the core layer of ABF organic substrates

TSMC’s approach: CoPoS uses glass substrates to replace silicon interposers

CPO approach: Glass substrates carry both electrical and optical interconnections, serving as the critical underlying material for co-packaged optics

These three paths are not mutually exclusive and may even converge in the future. Whichever path prevails, glass substrates will remain the common underlying material

Conclusion

Glass substrates are no longer a concept, but an industrial trend on the verge of realization.

The narrative of glass substrates is not 'replacing organic substrates', but 'solving problems that organic substrates cannot address'.

As AI chip packaging dimensions continue to expand, I/O density keeps climbing, and thermal management requirements grow increasingly stringent, a material-level shift is inevitable.

2026 marks the critical window for this transformation, moving from zero to one.